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Efficient Hardware Implementation of Deep Learning Computation and its Application – Prof. Seokbum Ko, University of Saskatchewan, Canada

November 20 @ 17:30 - 19:00

Abstract:
Deep learning can provide superior performance in many fields of applications. However, the cost of implementing deep learning models in practical applications is expensive. Deep learning models are both computation intensive and memory intensive. Computation is an important aspect for deep learning. It can determine the latency that is how fast the results can be obtained. In this seminar, computer arithmetic for deep learning will be discussed. This lecture will start with discussing the computation requirements of deep learning models and layers. Then, several computer arithmetic designs for deep learning in the literature will be used as examples. Finally, future trends of computer arithmetic for deep learning computation will be discussed.
Posit is designed as an alternative to IEEE 754 floating-point format for many applications. It has non-uniformed number distribution, and it can provide a much larger dynamic range than IEEE floating-point format. These make posit especially suitable for deep learning applications. In recent years, more and more posit based deep learning hardware accelerators appear in the literature. In this lecture, the basics of posit format and the corresponding posit-based arithmetic units available in the literature, including adder, multiplier, multiply-accumulate unit, and quire operator, will be discussed. Then, several posit-based deep learning processors for deep learning inference and training will be discussed. Finally, the trends and challenges of posit arithmetic units and posit based deep learning processors will be discussed to motivate more related research works.
Deep learning applications will be shared with the audience.
Bio:
Seokbum Ko is currently a Professor at the Department of Electrical and Computer Engineering and the Division of Biomedical Engineering, University of Saskatchewan, Canada. He received his PhD from the University of Rhode Island, USA in 2002.
His areas of research interest include computer architecture/arithmetic, efficient hardware implementation of compute-intensive applications, deep learning processor architecture and biomedical engineering.
He is an IEEE Cicuits and Systems Society Distinguished Lecturer (2024-2025), a senior member of IEEE circuits and systems society and an associate editor for IEEE TVLSI, IEEE TCAS-II, IEEE Access and IET Computers & Digital Techniques. He is an active member of IEEE CAS Technical Committee, IEEE P3109, IEEE754-2029, IEEE Domain-Specific Accelerators Standarads Committee and IEEE Emerging Processor Systems Standards Committee. He was an associate editor for IEEE TCASI (2019-2021).
The webinar is free but registration is required.
Zoom link will be sent after registration.
Virtual: https://events.vtools.ieee.org/m/446950

Details

Date:
November 20
Time:
17:30 - 19:00
Website:
https://events.vtools.ieee.org/m/446950