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Bringing ML to the extreme edge: a story of co-optimizing processor architectures, scheduling and models

January 19 @ 10:00 am - 12:00 pm

We invite you to a free online seminar on “Bringing ML to the extreme edge: a story of co-optimizing processor architectures, scheduling and models” given by Prof. Marian Verhelst, KU Leuven, Belgium. Deep neural network inference comes with significant computational complexity, making their execution until recently only feasible on power-hungry server or GPU platforms. The recent trend towards real-time embedded neural network processing on edge and extreme edge devices requires a thorough cross-layer optimization. The talk will analyze what impacts NN execution energy and latency. Subsequently, we will present different research lines of Prof. Verhelst’s lab exploiting and jointly optimizing NPU/TPU processor architectures, dataflow schedulers and conditional, quantized neural network models for minimum latency and maximum energy efficiency. This includes precision-scalable fully-digital designs, as well as compute-in-memory processors. Finally, this talk will make a case for more methodological design space exploration in the vast optimization space of embedded NN processors, using the ZigZag framework. Please sign up and join us on Wednesday, January 19, 2022 at 10:00 (Israel Time). A link to the Zoom session will be provided after registration. Important: The participation is free of charge, but registration is required https://acrc.net.technion.ac.il/registration-marian-verhelst/ For more details and updates on the series of “ACRC Semiconductor Webinars” please follow our newsletters and our website https://acrc.net.technion.ac.il/ Haifa, Haifa District, Israel, Virtual: https://events.vtools.ieee.org/m/297199

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