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DTSTART;TZID=Asia/Jerusalem:20241112T160000
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DTSTAMP:20241111T224650Z
CREATED:20241010T183020Z
LAST-MODIFIED:20241111T224650Z
UID:2620-1731427200-1731431400@ieee.org.il
SUMMARY:הפחתת רעשים בכרטיסים אלקטרונים
DESCRIPTION:IEEE EMC & SI\, PI Israel\nואיגוד מהנדסי האלקטרוניקה בלשכת המהנדסים\nמזמינים לוובינר ללא עלות בנושא:\nהפחתת רעשים בכרטיסים אלקטרונים: כלים וגישות מתקדמות ל Board Design\nפליטה אלקטרו-מגנטית מכרטיס אלקטרוני\, נבדקת עפ”י תקנים אזרחיים /צבאיים\, ומהווה אתגר\, למתכנן המעגלים במיוחד ככל שקצבי התקשורת עולים\, היעילות האנרגטית עולה\, ואילוצי מקום ותכן קשוחים יותר.\nאתגר גדול יותר הוא תכנון מערכות המשלבות סנסורים RF’ ים\, בקרבה לרכיבים דיגיטליים. פגיעה ברגישות הקליטה של החלק ה- RF היא פועל יוצא של פליטה אלקטרו-מגנטית לא רצונית מהפעילות הדיגיטלית בקרבה.\nלפיכך\, הבנה ושליטה על מנגנוני הרעש בכרטיס\, נדרשת מכל Board Designer\nבוובינר נסקור את השיטות והכלים המתקדמים ביותר\, להתמודדות עם האתגרים הללו.\nלהרשמה ללא עלות>> https://www.aeai.org.il/activity/noise-reduction-webiner/\nעידית שפר | מנהלת איגודים\nלפעילויות הלשכה (https://www.aeai.org.il/activity/?sign)\nמשרד 03.5205818 | פקס 03.5272496\nVirtual: https://events.vtools.ieee.org/m/438854
URL:https://ieee.org.il/event/%d7%94%d7%a4%d7%97%d7%aa%d7%aa-%d7%a8%d7%a2%d7%a9%d7%99%d7%9d-%d7%91%d7%9b%d7%a8%d7%98%d7%99%d7%a1%d7%99%d7%9d-%d7%90%d7%9c%d7%a7%d7%98%d7%a8%d7%95%d7%a0%d7%99%d7%9d/
LOCATION:Virtual: https://events.vtools.ieee.org/m/438854
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BEGIN:VEVENT
DTSTART;TZID=Asia/Jerusalem:20241120T173000
DTEND;TZID=Asia/Jerusalem:20241120T190000
DTSTAMP:20241119T233528Z
CREATED:20241119T233021Z
LAST-MODIFIED:20241119T233528Z
UID:2675-1732123800-1732129200@ieee.org.il
SUMMARY:Efficient Hardware Implementation of Deep Learning Computation and its Application - Prof. Seokbum Ko\, University of Saskatchewan\, Canada
DESCRIPTION:Abstract:\nDeep learning can provide superior performance in many fields of applications. However\, the cost of implementing deep learning models in practical applications is expensive. Deep learning models are both computation intensive and memory intensive. Computation is an important aspect for deep learning. It can determine the latency that is how fast the results can be obtained. In this seminar\, computer arithmetic for deep learning will be discussed. This lecture will start with discussing the computation requirements of deep learning models and layers. Then\, several computer arithmetic designs for deep learning in the literature will be used as examples. Finally\, future trends of computer arithmetic for deep learning computation will be discussed.\nPosit is designed as an alternative to IEEE 754 floating-point format for many applications. It has non-uniformed number distribution\, and it can provide a much larger dynamic range than IEEE floating-point format. These make posit especially suitable for deep learning applications. In recent years\, more and more posit based deep learning hardware accelerators appear in the literature. In this lecture\, the basics of posit format and the corresponding posit-based arithmetic units available in the literature\, including adder\, multiplier\, multiply-accumulate unit\, and quire operator\, will be discussed. Then\, several posit-based deep learning processors for deep learning inference and training will be discussed. Finally\, the trends and challenges of posit arithmetic units and posit based deep learning processors will be discussed to motivate more related research works.\nDeep learning applications will be shared with the audience.\nBio:\nSeokbum Ko is currently a Professor at the Department of Electrical and Computer Engineering and the Division of Biomedical Engineering\, University of Saskatchewan\, Canada. He received his PhD from the University of Rhode Island\, USA in 2002.\nHis areas of research interest include computer architecture/arithmetic\, efficient hardware implementation of compute-intensive applications\, deep learning processor architecture and biomedical engineering.\nHe is an IEEE Cicuits and Systems Society Distinguished Lecturer (2024-2025)\, a senior member of IEEE circuits and systems society and an associate editor for IEEE TVLSI\, IEEE TCAS-II\, IEEE Access and IET Computers & Digital Techniques. He is an active member of IEEE CAS Technical Committee\, IEEE P3109\, IEEE754-2029\, IEEE Domain-Specific Accelerators Standarads Committee and IEEE Emerging Processor Systems Standards Committee. He was an associate editor for IEEE TCASI (2019-2021).\nThe webinar is free but registration is required.\nZoom link will be sent after registration.\nVirtual: https://events.vtools.ieee.org/m/446950
URL:https://ieee.org.il/event/efficient-hardware-implementation-of-deep-learning-computation-and-its-application-prof-seokbum-ko-university-of-saskatchewan-canada/
LOCATION:Virtual: https://events.vtools.ieee.org/m/446950
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DTSTART;TZID=Asia/Jerusalem:20241125T113000
DTEND;TZID=Asia/Jerusalem:20241125T123000
DTSTAMP:20241125T084921Z
CREATED:20241113T230020Z
LAST-MODIFIED:20241125T084921Z
UID:2667-1732534200-1732537800@ieee.org.il
SUMMARY:IEEE Photonics Society Distinguished Lecturer\, Daniel Renner: Monolithic\, Heterogeneous and Hybrid Photonic Integration
DESCRIPTION:Photonic integration has been at the center of photonic activity for several years. Over this period\, great strides have been made to increase the integration density and integrated chip functionality. This talk will work its way up from the drivers for photonic integration – why do we need Photonic Integrated Circuits (PICs)? What are their similarities and differences with Electronic Integrated Circuits (EICs)? This analysis of integration drivers will lead to a discussion of recent progress on the main paths: monolithic\, heterogeneous and hybrid. The talk will conclude with possible approaches to meet the additional demanding considerations for future Quantum PICs.\nSpeaker(s): \, Daniel\nRoom: 329 (third floor)\, Bldg: Engineering Building\, Bar Ilan University\, Ramat Gan\, Tel Aviv District\, Israel
URL:https://ieee.org.il/event/ieee-photonics-society-distinguished-lecturer-daniel-renner-monolithic-heterogeneous-and-hybrid-photonic-integration/
LOCATION:Room: 329 (third floor)\, Bldg: Engineering Building\, Bar Ilan University\, Ramat Gan\, Tel Aviv District\, Israel
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